perl-Hardware-Verilog-Parser - Complete grammar for parsing Verilog code using perl
| Website: | http://search.cpan.org/dist/Hardware-Verilog-Parser/ |
|---|---|
| License: | GPL+ or Artistic |
| Vendor: | Fedora Project <http://bugzilla.redhat.com/bugzilla> |
- Description:
This module defines the complete grammar needed to parse any Verilog code. By overloading this grammar, it is possible to easily create perl scripts which run through Verilog code and perform specific functions.
Packages
| perl-Hardware-Verilog-Parser-0.13-1.el5.src [26 KiB] |
Changelog
by Chitlesh GOORAH (2008-12-14):
- Specfile autogenerated by cpanspec 1.77. |